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| 0.5 n cmos a 1.8 v to 5.5 v 2:1 mux/spdt switches features low on resistance 0.8 n max at 125 c 0.25 n max on resistance flatness 1.8 v to 5.5 v single supply 200 ma current carrying capability automotive temperature range: C40 c to +125 c rail-to-rail operation 6-lead sot-23 package, 8-lead / soic package, and 6-bump microcsp (micro chip scale package) adg819 fast switching times typical power consumption (<0.01 / w) ttl-/cmos-compatible inputs pin compatible with the adg719 (adg819) applications power routing battery-powered systems communication systems data acquisition systems cellular phones modems pcmcia cards hard drives relay replacement general description the adg819 and the adg820 are monolithic, cmos, spdt (single-pole, double-throw) switches. these switches are de signed on a submicron process that provides low power dissipation yet gives high switching speed, low on resistance, and low leakage currents. low power consumption and an operating supply range of 1.8 v to 5.5 v make the adg819 and adg820 ideal for battery-pow- ered, portable instruments. each switch of the adg819 and the adg820 conducts equally well in both directions when on. the adg819 exhibits break- before-make switching action, thus preventing momentary sh orting when switching channels. the adg820 exhibits make-before- break action. the adg819 and the adg820 are available in a 6-lead sot-23 package and an 8-lead soic package. the adg819 is also available in a 2 3 bump 1.14 mm 2.18 mm microcsp package. this chip occupies only a 1.14 mm 2.18 mm area, making it the ideal candidate for space-constrained applications. rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. adg819/adg820 functional block diagram s2 d s1 in adg819/ adg820 switches shown for a logic 1 input product highlights 1. very low on resistance, 0.5 ? typical 2. 1.8 v to 5.5 v single-supply operation 3. high current carrying capability 4. tiny 6-lead sot-23 package, 8-lead soic package, and 2 3 bump 1.14 mm 2.18 mm microcsp package (adg819 only) one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781/329-4700 www.analog.com fax: 781/326-8703 ? analog devices, inc., 2002 (v dd = 5 v 10%, gnd = 0 v.) adg819/adg820Cspecifications 1 parameter C40 c to C40 c to 25 c +85 c +125 c 2 unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 0.5 ? typ v s = 0 v to v dd , i s = 100 ma; on resistance match between 0.6 0.7 0.8 ? max test circuit 1 channels ( ? r on ) 0 . 0 6 ? typ v s = 0 v to v dd , i s = 100 ma 0.08 0.1 0.12 ? max on resistance flatness (r flat(on) ) 0.1 ? typ v s = 0 v to v dd , i s = 100 ma 0.17 0.2 0.25 ? max leakage currents v dd = 5.5 v source off leakage i s (off) 0.01 0.25 3 10 na typ na max v s = 4.5 v/1 v, v d = 1 v/4.5 v; test circuit 2 channel on leakage i d , i s ( on) 0.01 0.25 3 25 na typ na max v s = v d = 1 v, or v s = v d = 4.5 v; test circuit 3 digital inputs input high voltage, v inh input low voltage, v inl input current i inl or i inh c in, digital input capacitance 2.0 0.8 0.005 0.1 5 v min v max a typ a max pf typ v in = v inl or v inh dynamic characteristics 3 adg819 t on 35 ns typ r l = 50 ? , c l = 35 pf, 45 50 55 ns max v s = 3 v; test circuit 4 t off 10 ns typ r l = 50 ? , c l = 35 pf, 16 18 21 ns max v s = 3 v; test circuit 4 break-before-make time delay, t bbm 5 ns typ r l = 50 ? , c l = 35 pf, adg820 1 ns min v s1 = v s2 = 3 v; test circuit 5 t on 10 ns typ r l = 50 ? , c l = 35 pf, 18 20 22 ns max v s = 3 v; test circuit 4 t off 26 ns typ r l = 50 ? , c l = 35 pf, 40 45 50 ns max v s = 3 v; test circuit 4 make-before-break time delay, t mbb 15 ns typ r l = 50 ? , c l = 35 pf, 1 ns min v s = 0 v; test circuit 6 charge injection 20 pc typ v s = 2.5 v, r s = 0 ?, c l = 1 nf; test circuit 7 off isolation C71 db typ r l = 50 ? , c l = 5 pf, f = 100 khz; test circuit 8 channel-to-channel crosstalk C72 db typ r l = 50 ? , c l = 5 pf, f = 100 khz; test circuit 10 bandwidth C3 db 17 mhz typ r l = 50 ? , c l = 5 pf; test circuit 9 c s (off) 80 pf typ f = 1 mhz c d, c s (on) 300 pf typ f = 1 mhz power requirements v dd = 5.5 v digital inputs = 0 v or 5.5 v i dd 0.001 a typ 1.0 2.0 a max notes 1 temperature range is as follows: C40 c to +125 c. 2 on resistance parameters tested with i s = 10 ma. 3 guaranteed by design, not subject to production test. specifications subject to change without notice. C2C rev. 0 adg819/adg820 (v dd = 2.7 v to 3.6 v, gnd = 0 v.) specifications 1 parameter C40 c to C40 c to 25 c +85 c +125 c 2 unit test conditions/comments analog switch analog signal range 0 v to v dd v on resistance (r on ) 0.7 ? typ v s = 0 v to v dd , i s = 100 ma; on resistance match between 1.4 1.5 1.6 ? max test circuit 1 channels ( ? r on ) 0 . 0 6 ? typ v s = 0 v to v dd , i s = 100 ma 0.13 0.13 ? max on resistance flatness (r flat(on) ) 0.25 ? typ v s = 0 v to v dd , i s = 100 ma leakage currents v dd = 3.6 v source off leakage i s (off) 0.01 0.25 3 10 na typ na max v s = 3.3 v/1 v, v d = 1 v/3.3 v; test circuit 2 channel on leakage i d , i s ( on) 0.01 0.25 3 25 na typ na max v s = v d = 1 v, or v s = v d = 3.3 v; test circuit 3 digital inputs input high voltage, v inh input low voltage, v inl input current i inl or i inh c in, digital input capacitance 2.0 0.8 0.005 0.1 5 v min v max a typ a max pf typ v in = v inl or v inh dynamic characteristics 3 adg819 t on 40 ns typ r l = 50 ? , c l = 35 pf, 60 65 70 ns max v s = 1.5 v; test circuit 4 t off 10 ns typ r l = 50 ? , c l = 35 pf, 16 18 21 ns max v s = 1.5 v; test circuit break-before-make time delay, t bbm 40 ns typ r l = 50 ? , c l = 35 pf, adg820 1 ns min v s1 = v s2 = 1.5 v; test circuit 5 t on 20 ns typ r l = 50 ? , c l = 35 pf, 35 40 45 ns max v s = 1.5 v; test circuit 4 t off 30 ns typ r l = 50 ? , c l = 35 pf, 45 50 55 ns max v s = 1.5 v; test circuit 4 make-before-break time delay, t mbb 10 ns typ r l = 50 ? , c l = 35 pf, 1 ns min v s = 1.5 v; test circuit 6 charge injection 10 pc typ v s = 1.5 v, r s = 0 ?, c l = 1 nf; test circuit 7 off isolation C71 db typ r l = 50 ? , c l = 5 pf, f = 100 khz; test circuit 8 channel-to-channel crosstalk C72 db typ r l = 50 ? , c l = 5 pf, f = 100 khz; test circuit 10 bandwidth C3 db 17 mhz typ r l = 50 ? , c l = 5 pf; test circuit 9 c s (off) 80 pf typ f = 1 mhz c d , c s (on) 300 pf typ f = 1 mhz power requirements v dd = 3.6 v digital inputs = 0 v or 3.6 v i dd 0.001 a typ 1.0 2.0 a max notes 1 temperature range is as follows: C40 c to +125 c. 2 on resistance parameters tested with i s = 10 ma. 3 guaranteed by design, not subject to production test. specifications subject to change without notice. rev. 0 C3C adg819/adg820 absolute maximum ratings 1 (t a = 25 c, unless otherwise noted.) v dd to gnd . . . . . . . . . . . . . . . . . . . . . . . . . . C0.3 v to +7 v analog inputs 2 . . . . . . . . . . . . . . . . . C0.3 v to v dd + 0.3 v or . . . . . . . . . . . . . . . . . . . . . . . 30 ma, whichever occurs first digital inputs 2 . . . . . . . . . . . . . . . . . C0.3 v to v dd + 0.3 v or . . . . . . . . . . . . . . . . . . . . . . . 30 ma, whichever occurs first peak current, s or d . . . . . . . . . . . . . . . . . . . . . . . . . 400 ma . . . . . . . . . . . . . . . .( pulsed at 1 ms, 10% duty cycle max) continuous current, s or d . . . . . . . . . . . . . . . . . . . 200 ma operating temperature range industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +85 c automotive . . . . . . . . . . . . . . . . . . . . . . . . C40 c to +125 c storage temperature range . . . . . . . . . . . . C65 c to +150 c junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . 150 c soic package ! ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 206 c/w ! jc thermal impedance . . . . . . . . . . . . . . . . . . . . . . 44 c/w sot-23 package (4-layer board) ! ja thermal impedance . . . . . . . . . . . . . . . . . . . . . 119 c/w microcsp package ! ja thermal impedance . . . . . . . . . . . . . . . . . . . . . . . . tbd lead temperature, soldering (10 sec) . . . . . . . . . . . . 300 c ir reflow, peak temperature (<20 sec) . . . . . . . . . . . 235 c notes 1 stresses above those listed under absolute maximum ratings may cause perma- nent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. 2 overvoltages at in, s, or d will be clamped by internal diodes. current should be limited to the maximum ratings given. table i. truth table for the adg819/adg820 in switch s1 switch s2 0 on off 1 off on pin configurations 6-lead sot-23 8-lead soic (rj-6) (rm-8) top view (not to scale) 6 2 adg820 5 4 1 3 adg819/ s2 d in top view (not to scale) 8 7 6 5 1 2 3 4 adg819/ adg820 s2 nc d s1 in v dd gnd v dd s1 gnd nc nc = no connect ordering guide m odel option temperature range brand 1 package description package adg819brm adg819brt adg819bcb adg820brm adg820brt C40 c to +125 c C40 c to +125 c C40 c to +85 c C40 c to +125 c C40 c to +125 c snb snb snb spb spb soic (microsmall outline ic) sot-23 (plastic surface-mount) microcsp (micro chip scale package) soic (microsmall outline ic) sot-23 (plastic surface-mount) rm-8 rj-6 2 cb-6 2 rm-8 rj-6 2 notes 1 branding on these packages is limited to three characters due to space constraints. 2 contact factory for availability. 2 x 3 microcsp top view (bumps at the bottom) not to scale s2 1 in 6 d 2 v dd 5 s1 3 gnd 4 adg819 only C4C rev. 0 adg819/adg820 terminology v dd most positive power supply potential gnd ground (0 v) reference i dd positive supply current s source terminal. may be an input or output. d d rain terminal. may be an input or output. in logic control input r on ohmic resistance between d and s ? r on on resistance match between any two channels, i.e., r on max C r on min r flat(on) flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. i s (off) source leakage current with the switch off i d , i s (on) channel leakage current with the switch on v d (v s ) a nalog voltage on terminals d, s v inl maximum input voltage for logic 0 v inh minimum input voltage for logic 1 i inl (i inh ) input current of the digital input c s (off) off switch source capacitance c d , c s (on) on sw itch capacitance t on delay between applying the digital control input and the output switching on. t off delay between applying the digital control input and the output switching off. t bbm off time or on time measured between the 90% points of both switches when switching from one address state to another. t mbb on time measured between the 80% points of both switches when switching from one ad dress state to another. charge injection a measure of the glitch impulse transferred from the digital input to the analog output during switching. crosstalk a measure of unwanted signal coupled through from one channel to another as a result of parasitic capacitance. off isolation a measure of unwanted signal coupling through an off switch. bandwidth frequency at which the output is attenuated by C3 db. on response frequency response of the on switch insertion loss loss due to the on resistance of the switch caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the adg819/ adg820 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality. warning! esd sensitive device rev. 0 C5C 0.2 adg819/adg820 Ct ypical performance characteristics 1.0 1.0 0.9 0.8 0.8 t a = 25c v dd = 2.7v v dd = 3v v dd = 3.3v v dd = v dd = 4.5v 5v v dd = 5.5v v dd = 3v 5 c t a = +85c t a = +12 t a = +25c t a = C40c leakage currents C na on resistance C n on resistance C n 0.7 0.6 0.5 0.4 0.3 on resistance C n 0.6 0.4 0.2 0.1 0 0 0 1 2 3 4 5 0 0.5 1.0 1.5 2.0 2.5 3.0 v d , v s C v v d , v s C v tpc 1. on resistance vs. v d (v s ) tpc 4. on resistance vs. v d (v s ) for different temperatures 10 1.0 t a = 25c v dd = 1.8v v dd = 5v t a = +85c t a = +125c t a = +25c t a = C40c 9 8 7 6 5 4 3 2 0.8 on resistance C n 0.6 0.4 0.2 1 0 0 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 0 1 2 3 4 5 v d , v s C v v d , v s C v tpc 2. on resistance vs. v d (v s ) tpc 5. on resistance vs. v d (v s ) for different temperatures 50 10 v dd = 3v, 5v i d , i s (on) i s (off) t on v dd = 3v v dd = 5v t off v dd = 3v, 5v 8 40 6 time C ns 30 20 4 2 10 0 0 C2 0 20 40 6 0 80 100 120 C40 C20 0 20 40 60 80 100 120 temperature C c temperature C c tpc 3. leakage currents vs. temperatures tpc 6. t on /t off times vs. temperature (adg819) C6C rev. 0 adg819/adg820 250 1 200 0 150 t a = 25c v dd = 5v v dd = 3v 0.2 10 1 30 v dd = 3v, 5v t a = 25c charge injection C pc C1 logic threshold voltage C v attenuation C db 100 50 0 C50 C2 C3 C4 C100 C5 C150 C200 C6 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v s C v frequency C mhz tpc 7. charge injection vs. source voltage tpc 10. on response vs. frequency 0 1.8 v dd = 5v, 3v t a = 25c t a = 25c rising falling C10 C20 1.6 1.4 1.2 1.0 0.8 0.6 0.4 attenuation C db C30 C40 C50 C60 C70 C80 0.2 C90 0 0.1 1 2 0 1 2 3 4 5 6 frequency C mhz v dd C v tpc 8. off isolation vs. frequency tpc 11. logic threshold vs. supply voltage 0.1 1 2 frequency C mhz tpc 9. crosstalk vs. frequency 0 attenuation C db C20 C50 C70 C80 C90 C10 C30 C40 C60 rev. 0 C7C adg819/adg820 t est circuits i ds s d v1 r on = v1 / i os nc v s s d i d (off) i s (off) v d v s v d s d i d (on) nc = no connect test circuit 1. on resistance test circuit 2. off leakage test circuit 3. on leakage v dd r l 50n c l 35pf in gnd v dd 0.1/f v in 50% 90% 90% v out v s 50% t on t off test circuit 4. switching times v dd r l 50n c l 35pf in gnd v dd 0.1/f s2 s1 v in d v in 50% 50% 0v v s1 v out 90% 90% v out 0v v s2 t bbm t bbm test circuit 5. break-before-make time delay, t bbm (adg819 only) r l2 300 n c l2 35pf v s2 in gnd v dd v dd 0.1/f v d r l1 300 n c l1 35pf v s1 v in v in 0v 50% 90% 80% v d 80% v d 50% v s1 v s2 t mbb test circuit 6. make-before-break time delay, t mbb (adg820 only) C8C rev. 0 adg819/adg820 v s c l 1nf in gnd v dd v dd v out sw off sw off sw off sw off sw on sw on q inj = c l x v out v out v in v in r s v out test circuit 7. charge injection in gnd v dd v dd 0.1/f 50n v in s d network analyzer v out r l 50n v s 50n v out off isolation = 20 log v s test circuit 8. off isolation in gnd v dd v dd 0.1/f v in s d network analyzer v out r l 50n v s 50n v out with switch insertion loss = 20 log v out without switch test circuit 9. bandwidth gnd v dd 0.1/f s2 s1 d in network analyzer v out r l 50n v s r 50n v dd 50n v out channel-to-channel crosstalk = 20 log v s test circuit 10. channel-to-channel crosstalk rev. 0 C9C adg819/adg820 outline dimensions 6-lead plastic surface-mount package (rj-6) dimensions shown in inches and (mm) 1 3 45 2 6 0.1220 (3.10) 0.1063 (2.70) pin 1 0.0709 (1.80) 0.0591 (1.50) 0.1181 (3.00) 0.0984 (2.50) 0.0748 (1.90) 0.0374 (0.95) bsc bsc 0.0512 (1.30) 0.0571 (1.45) 0.0354 (0.90) 0.0354 (0.90) 10 0.0059 (0.15) 0.0197 (0.50) 0 0.0217 (0.55) 0.0091 (0.23) seating 0.0000 (0.00) 0.0098 (0.25) plane 0.0138 (0.35) 0.0031 (0.08) coplanarity 8-lead / soic package (rm-8) dimensions shown in inches and (mm) 8 5 4 1 0.1220 (3.10) 0.1142 (2.90) 0.1988 (5.05) 0.1870 (4.75) 0.1220 (3.10) 0.1142 (2.90) pin 1 0.0256 (0.65) bsc 0.1201 (3.05) 0.1201 (3.05) 0.1118 (2.84) 0.1118 (2.84) 0.0429 (1.09) coplanarity 0.0370 (0.94) 0.0059 (0.15) 33 0.0020 (0.05) 0.0181 (0.46) 27 0.0280 (0.71) 0.0110 (0.28) 0.0079 (0.20) 0.0161 (0.41) plane seating 0.0031 (0.08) 2 3 array for microcsp (cb-6) dimensions shown in millimeters and (inches) 0.67 (0.0264) 0.57 (0.0224) 0.47 (0.0185) 0.44 (0.0173) 0.36 (0.0142) seating plane 0.28 (0.0110) 0.32 (0.0126) nom 0.50 (0.0197) ball pitch 2.38 (0.0937) 2.18 (0.0858) 1.98 (0.0780) 0.24 (0.0094) 0.22 (0.0087) coplanarity 0.32 (0.0126) 0.59 (0.0232) 0.20 (0.0079) 0.50 (0.0860) 1.34 (0.0528) 1.14 (0.0449) 0.94 (0.0370) pin 1 identifier controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design C10C rev. 0 C11C c02801C0C5/02(0) printed in u.s.a. C12C |
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